ordered PCB V1.0

This commit is contained in:
2021-09-23 14:10:02 +02:00
parent c04f2228e4
commit 48e335ef7a
46 changed files with 46122 additions and 111432 deletions

View File

@@ -99,33 +99,6 @@ X Pin_2 2 -200 -100 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_Generic_Conn_01x06
#
DEF Connector_Generic_Conn_01x06 J 0 40 Y N 1 F N
F0 "J" 0 300 50 H V C CNN
F1 "Connector_Generic_Conn_01x06" 0 -400 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_1x??_*
$ENDFPLIST
DRAW
S -50 -295 0 -305 1 1 6 N
S -50 -195 0 -205 1 1 6 N
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 105 0 95 1 1 6 N
S -50 205 0 195 1 1 6 N
S -50 250 50 -350 1 1 10 f
X Pin_1 1 -200 200 150 R 50 50 1 1 P
X Pin_2 2 -200 100 150 R 50 50 1 1 P
X Pin_3 3 -200 0 150 R 50 50 1 1 P
X Pin_4 4 -200 -100 150 R 50 50 1 1 P
X Pin_5 5 -200 -200 150 R 50 50 1 1 P
X Pin_6 6 -200 -300 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_USB_B_Micro
#
DEF Connector_USB_B_Micro J 0 40 Y Y 1 F N
@@ -295,6 +268,80 @@ X A 2 150 0 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_Q_Dual_NMOS_S1G1D2S2G2D1
#
DEF Device_Q_Dual_NMOS_S1G1D2S2G2D1 Q 0 0 Y N 2 F N
F0 "Q" 250 50 50 H V C CNN
F1 "Device_Q_Dual_NMOS_S1G1D2S2G2D1" 750 -50 50 H V C CNN
F2 "" 200 0 50 H I C CNN
F3 "" 200 0 50 H I C CNN
$FPLIST
TSOP*
SC?70*
SC?88*
SOT?363*
$ENDFPLIST
DRAW
C 65 0 110 0 1 10 N
C 100 -70 10 0 1 0 F
C 100 70 10 0 1 0 F
P 2 0 1 0 10 0 -100 0 N
P 2 0 1 10 10 75 10 -75 N
P 2 0 1 10 30 -50 30 -90 N
P 2 0 1 10 30 20 30 -20 N
P 2 0 1 10 30 90 30 50 N
P 2 0 1 0 100 100 100 70 N
P 3 0 1 0 100 -100 100 0 30 0 N
P 4 0 1 0 30 -70 130 -70 130 70 30 70 N
P 4 0 1 0 40 0 80 15 80 -15 40 0 F
P 4 0 1 0 110 20 115 15 145 15 150 10 N
P 4 0 1 0 130 15 115 -10 145 -10 130 15 N
X S 1 100 -200 100 U 50 50 1 1 P
X G 2 -200 0 100 R 50 50 1 1 I
X D 6 100 200 100 D 50 50 1 1 P
X D 3 100 200 100 D 50 50 2 1 P
X S 4 100 -200 100 U 50 50 2 1 P
X G 5 -200 0 100 R 50 50 2 1 I
ENDDRAW
ENDDEF
#
# Device_Q_Dual_PMOS_S1G1D2S2G2D1
#
DEF Device_Q_Dual_PMOS_S1G1D2S2G2D1 Q 0 0 Y N 2 F N
F0 "Q" 250 50 50 H V C CNN
F1 "Device_Q_Dual_PMOS_S1G1D2S2G2D1" 750 -50 50 H V C CNN
F2 "" 50 0 50 H I C CNN
F3 "" 50 0 50 H I C CNN
$FPLIST
TSOP*
SC?70*
SC?88*
SOT?363*
$ENDFPLIST
DRAW
C 65 0 110 0 1 10 N
C 100 -70 10 0 1 0 F
C 100 70 10 0 1 0 F
P 2 0 1 0 10 0 -100 0 N
P 2 0 1 10 10 75 10 -75 N
P 2 0 1 10 30 -50 30 -90 N
P 2 0 1 10 30 20 30 -20 N
P 2 0 1 10 30 90 30 50 N
P 2 0 1 0 100 100 100 70 N
P 3 0 1 0 100 -100 100 0 30 0 N
P 4 0 1 0 30 70 130 70 130 -70 30 -70 N
P 4 0 1 0 90 0 50 15 50 -15 90 0 F
P 4 0 1 0 110 -20 115 -15 145 -15 150 -10 N
P 4 0 1 0 130 -15 115 10 145 10 130 -15 N
X S 1 100 -200 100 U 50 50 1 1 P
X G 2 -200 0 100 R 50 50 1 1 I
X D 6 100 200 100 D 50 50 1 1 P
X D 3 100 200 100 D 50 50 2 1 P
X S 4 100 -200 100 U 50 50 2 1 P
X G 5 -200 0 100 R 50 50 2 1 I
ENDDRAW
ENDDEF
#
# Device_R
#
DEF Device_R R 0 0 N Y 1 F N
@@ -528,24 +575,28 @@ X EN 9 -800 1400 100 R 50 50 0 0 I
ENDDRAW
ENDDEF
#
# Regulator_Linear_TPS76333
# Regulator_Switching_XCL214B333DR
#
DEF Regulator_Linear_TPS76333 U 0 10 Y Y 1 F N
F0 "U" -150 225 50 H V C CNN
F1 "Regulator_Linear_TPS76333" 0 225 50 H V L CNN
F2 "Package_TO_SOT_SMD:SOT-23-5" 0 325 50 H I C CIN
DEF Regulator_Switching_XCL214B333DR U 0 20 Y Y 1 F N
F0 "U" 250 250 50 H V L CNN
F1 "Regulator_Switching_XCL214B333DR" 150 -500 50 H V L CNN
F2 "Package_DFN_QFN:USP-9B01" 50 -800 50 H I L CNN
F3 "" 0 0 50 H I C CNN
ALIAS TPS76318 TPS76325 TPS76327 TPS76329 TPS76330 TPS76333 TPS76338 TPS76350
ALIAS TPS563200_copy TPS565208_copy
$FPLIST
SOT?23*
$ENDFPLIST
DRAW
S -200 175 200 -200 0 1 10 f
X VIN 1 -300 100 100 R 50 50 1 1 W
X GND 2 0 -300 100 U 50 50 1 1 W
X EN 3 -300 0 100 R 50 50 1 1 I
X NC 4 300 0 100 L 50 50 1 1 N N
X VOUT 5 300 100 100 L 50 50 1 1 w
S -300 200 300 -450 0 1 10 f
X PGND 7 -50 -550 100 U 50 50 0 0 W
X L1 8 -50 300 100 D 50 50 0 0 P
X L2 9 400 -150 100 L 50 50 0 0 P
X VIN 1 -400 0 100 R 50 50 1 1 W
X NC 2 400 -300 100 L 50 50 1 1 N N
X Lx 3 100 300 100 D 50 50 1 1 P
X VOUT 4 400 0 100 L 50 50 1 1 w
X AGND 5 50 -550 100 U 50 50 1 1 W
X CE 6 -400 -150 100 R 50 50 1 1 I
ENDDRAW
ENDDEF
#
@@ -612,70 +663,6 @@ X B2 5 -200 0 100 R 50 50 2 1 I
ENDDRAW
ENDDEF
#
# Transistor_FET_2N7002
#
DEF Transistor_FET_2N7002 Q 0 20 Y N 1 F N
F0 "Q" 200 75 50 H V L CNN
F1 "Transistor_FET_2N7002" 200 0 50 H V L CNN
F2 "Package_TO_SOT_SMD:SOT-23" 200 -75 50 H I L CIN
F3 "" 0 0 50 H I L CNN
ALIAS 2N7002 2N7002E 2N7002H 2N7002K BS170F BS870 BSN20 BSS123 BSS127S DMG2302U DMG3402L DMG3404L DMG3406L DMG3414U DMG3418L DMN10H220L DMN10H700S DMN13H750S DMN2041L DMN2050L DMN2056U DMN2058U DMN2075U DMN2230U DMN24H11DS DMN24H3D5L DMN3042L DMN3051L DMN30H4D0L DMN3110S DMN3150L DMN3300U DMN3404L DMN6075S DMN6140L DMN67D7L DMN67D8L MMBF170 VN10LF ZVN3306F ZVN3310F ZVN3320F ZVN4106F ZXM61N02F ZXM61N03F ZXMN10A07F ZXMN2A01F ZXMN2A14F ZXMN2B01F ZXMN2B14FH ZXMN2F30FH ZXMN2F34FH ZXMN3A01F ZXMN3A14F ZXMN3B01F ZXMN3B14F ZXMN3F30FH ZXMN6A07F IRLML0030 IRLML2060 TSM2302CX AO3400A
$FPLIST
SOT?23*
$ENDFPLIST
DRAW
C 65 0 110 0 1 10 N
C 100 -70 10 0 1 0 F
C 100 70 10 0 1 0 F
P 2 0 1 0 10 0 -100 0 N
P 2 0 1 10 10 75 10 -75 N
P 2 0 1 10 30 -50 30 -90 N
P 2 0 1 10 30 20 30 -20 N
P 2 0 1 10 30 90 30 50 N
P 2 0 1 0 100 100 100 70 N
P 3 0 1 0 100 -100 100 0 30 0 N
P 4 0 1 0 30 -70 130 -70 130 70 30 70 N
P 4 0 1 0 40 0 80 15 80 -15 40 0 F
P 4 0 1 0 110 20 115 15 145 15 150 10 N
P 4 0 1 0 130 15 115 -10 145 -10 130 15 N
X G 1 -200 0 100 R 50 50 1 1 I
X S 2 100 -200 100 U 50 50 1 1 P
X D 3 100 200 100 D 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Transistor_FET_BSS84
#
DEF Transistor_FET_BSS84 Q 0 20 Y N 1 F N
F0 "Q" 200 75 50 H V L CNN
F1 "Transistor_FET_BSS84" 200 0 50 H V L CNN
F2 "Package_TO_SOT_SMD:SOT-23" 200 -75 50 H I L CIN
F3 "" 0 0 50 H I L CNN
ALIAS VP0610T BSS84 NTR2101P BSS83P Si2319CDS IRLML6401 IRLML6402 DMG2301L AO3401A IRLML9301 IRLML5203 Si2371EDS TSM2301ACX FDN340P
$FPLIST
SOT?23*
$ENDFPLIST
DRAW
C 65 0 110 0 1 10 N
C 100 -70 10 0 1 0 F
C 100 70 10 0 1 0 F
P 2 0 1 0 10 0 -100 0 N
P 2 0 1 10 10 75 10 -75 N
P 2 0 1 10 30 -50 30 -90 N
P 2 0 1 10 30 20 30 -20 N
P 2 0 1 10 30 90 30 50 N
P 2 0 1 0 100 100 100 70 N
P 3 0 1 0 100 -100 100 0 30 0 N
P 4 0 1 0 30 70 130 70 130 -70 30 -70 N
P 4 0 1 0 90 0 50 15 50 -15 90 0 F
P 4 0 1 0 110 -20 115 -15 145 -15 150 -10 N
P 4 0 1 0 130 -15 115 10 145 10 130 -15 N
X G 1 -200 0 100 R 50 50 1 1 I
X S 2 100 -200 100 U 50 50 1 1 P
X D 3 100 200 100 D 50 50 1 1 P
ENDDRAW
ENDDEF
#
# power_+3.3V
#
DEF power_+3.3V #PWR 0 0 Y Y 1 F P
@@ -735,19 +722,6 @@ X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_GND2
#
DEF power_GND2 #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "power_GND2" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND2 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_VBUS
#
DEF power_VBUS #PWR 0 0 Y Y 1 F P