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2 Commits

Author SHA1 Message Date
b1f27b9685 embedded oled 2022-12-21 08:36:35 +01:00
ed5c332bdd fix wifisettings, move to littleFS 2021-08-25 13:22:05 +02:00
24 changed files with 22415 additions and 7127 deletions

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@@ -16,7 +16,8 @@ monitor_speed = 115200
lib_deps =
glmnet/Dsmr@^0.3
juerd/ESP-WiFiSettings @ ^3.8.0
lib_ldf_mode = deep+
; littleFS
;lib_ldf_mode = deep+
;compile_flags =
; -std=c++11
board_build.filesystem = littlefs

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@@ -1,7 +1,6 @@
#include "connection.h"
String wifiState;
FS *filesystem = &SPIFFS;
void initWifiConnection(void)
{
@@ -35,7 +34,10 @@ void initWifiConnection(void)
void initConnection(void)
{
filesystem->begin();
if (!LittleFS.begin())
{
Serial.println("An Error has occurred while mounting LittleFS");
}
initWifiConnection();
}

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@@ -1,32 +1,6 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# Connector_Conn_01x04_Male
#
DEF Connector_Conn_01x04_Male J 0 40 Y N 1 F N
F0 "J" 0 200 50 H V C CNN
F1 "Connector_Conn_01x04_Male" 0 -300 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_1x??_*
$ENDFPLIST
DRAW
S 34 -195 0 -205 1 1 6 F
S 34 -95 0 -105 1 1 6 F
S 34 5 0 -5 1 1 6 F
S 34 105 0 95 1 1 6 F
P 2 1 1 6 50 -200 34 -200 N
P 2 1 1 6 50 -100 34 -100 N
P 2 1 1 6 50 0 34 0 N
P 2 1 1 6 50 100 34 100 N
X Pin_1 1 200 100 150 L 50 50 1 1 P
X Pin_2 2 200 0 150 L 50 50 1 1 P
X Pin_3 3 200 -100 150 L 50 50 1 1 P
X Pin_4 4 200 -200 150 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_RJ12
#
DEF Connector_RJ12 J 0 40 Y Y 1 F N
@@ -207,6 +181,36 @@ X ~RST 9 -500 1100 100 R 50 50 1 1 I
ENDDRAW
ENDDEF
#
# P1_wifi-eagle-import_DISP_OLED_UG-2832HSWEG02
#
DEF P1_wifi-eagle-import_DISP_OLED_UG-2832HSWEG02 LCD 0 40 Y Y 1 L N
F0 "LCD" -300 900 42 H V L BNN
F1 "P1_wifi-eagle-import_DISP_OLED_UG-2832HSWEG02" -300 -800 42 H V L BNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
T 900 200 -400 42 0 1 0 "128x32 OLED Display" Normal 0 L B
P 2 1 0 0 -300 -700 300 -700 N
P 2 1 0 0 -300 800 -300 -700 N
P 2 1 0 0 300 -700 300 800 N
P 2 1 0 0 300 800 -300 800 N
X C2+ 1 -400 700 100 R 50 50 1 0 B
X SCL 10 -400 -200 100 R 50 50 1 0 B
X SDA 11 -400 -300 100 R 50 50 1 0 B
X IREF 12 -400 -400 100 R 50 50 1 0 B
X VCOMH 13 -400 -500 100 R 50 50 1 0 W
X VCC 14 -400 -600 100 R 50 50 1 0 W
X C2- 2 -400 600 100 R 50 50 1 0 B
X C1+ 3 -400 500 100 R 50 50 1 0 B
X C1- 4 -400 400 100 R 50 50 1 0 B
X VBAT 5 -400 300 100 R 50 50 1 0 W
X VBREF 6 -400 200 100 R 50 50 1 0 W
X VSS 7 -400 100 100 R 50 50 1 0 W
X VDD 8 -400 0 100 R 50 50 1 0 W
X RES# 9 -400 -100 100 R 50 50 1 0 B
ENDDRAW
ENDDEF
#
# Regulator_Linear_MIC5219-3.3YM5
#
DEF Regulator_Linear_MIC5219-3.3YM5 U 0 10 Y Y 1 F N

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@@ -0,0 +1,3 @@
EESchema-DOCLIB Version 2.0
#
#End Doc Library

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74
P1_wifi/P1_wifi.kicad_prl Normal file
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@@ -0,0 +1,74 @@
{
"board": {
"active_layer": 0,
"active_layer_preset": "",
"auto_track_width": true,
"hidden_nets": [],
"high_contrast_mode": 1,
"net_color_mode": 1,
"opacity": {
"pads": 1.0,
"tracks": 1.0,
"vias": 1.0,
"zones": 0.6
},
"ratsnest_display_mode": 0,
"selection_filter": {
"dimensions": true,
"footprints": true,
"graphics": true,
"keepouts": true,
"lockedItems": true,
"otherItems": true,
"pads": true,
"text": true,
"tracks": true,
"vias": true,
"zones": true
},
"visible_items": [
0,
1,
2,
3,
4,
5,
8,
9,
10,
12,
13,
14,
15,
16,
17,
18,
19,
20,
21,
22,
23,
24,
25,
26,
27,
28,
29,
30,
32,
33,
34,
35,
36
],
"visible_layers": "0009830_80000001",
"zone_display_mode": 0
},
"meta": {
"filename": "P1_wifi.kicad_prl",
"version": 3
},
"project": {
"files": []
}
}

460
P1_wifi/P1_wifi.kicad_pro Normal file
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@@ -0,0 +1,460 @@
{
"board": {
"design_settings": {
"defaults": {
"board_outline_line_width": 0.049999999999999996,
"copper_line_width": 0.19999999999999998,
"copper_text_italic": false,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"copper_text_upright": false,
"courtyard_line_width": 0.049999999999999996,
"dimension_precision": 4,
"dimension_units": 3,
"dimensions": {
"arrow_length": 1270000,
"extension_offset": 500000,
"keep_text_aligned": true,
"suppress_zeroes": false,
"text_position": 0,
"units_format": 1
},
"fab_line_width": 0.09999999999999999,
"fab_text_italic": false,
"fab_text_size_h": 1.0,
"fab_text_size_v": 1.0,
"fab_text_thickness": 0.15,
"fab_text_upright": false,
"other_line_width": 0.09999999999999999,
"other_text_italic": false,
"other_text_size_h": 1.0,
"other_text_size_v": 1.0,
"other_text_thickness": 0.15,
"other_text_upright": false,
"pads": {
"drill": 0.762,
"height": 1.524,
"width": 1.524
},
"silk_line_width": 0.12,
"silk_text_italic": false,
"silk_text_size_h": 1.0,
"silk_text_size_v": 1.0,
"silk_text_thickness": 0.15,
"silk_text_upright": false,
"zones": {
"45_degree_only": false,
"min_clearance": 0.2032
}
},
"diff_pair_dimensions": [],
"drc_exclusions": [],
"meta": {
"filename": "board_design_settings.json",
"version": 2
},
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"copper_edge_clearance": "error",
"courtyards_overlap": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint_type_mismatch": "error",
"hole_clearance": "error",
"hole_near_hole": "error",
"invalid_outline": "error",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"missing_courtyard": "ignore",
"missing_footprint": "warning",
"net_conflict": "warning",
"npth_inside_courtyard": "ignore",
"padstack": "error",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_over_copper": "warning",
"silk_overlap": "warning",
"skew_out_of_range": "error",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_dangling": "warning",
"track_width": "error",
"tracks_crossing": "error",
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
"zone_has_empty_net": "error",
"zones_intersect": "error"
},
"rule_severitieslegacy_courtyards_overlap": true,
"rule_severitieslegacy_no_courtyard_defined": false,
"rules": {
"allow_blind_buried_vias": false,
"allow_microvias": false,
"max_error": 0.005,
"min_clearance": 0.0,
"min_copper_edge_clearance": 0.024999999999999998,
"min_hole_clearance": 0.25,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.19999999999999998,
"min_microvia_drill": 0.09999999999999999,
"min_silk_clearance": 0.0,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.2032,
"min_via_annular_width": 0.049999999999999996,
"min_via_diameter": 0.39999999999999997,
"use_height_for_length_calcs": true
},
"track_widths": [
0.0,
0.254,
0.4064
],
"via_dimensions": [
{
"diameter": 0.0,
"drill": 0.0
},
{
"diameter": 0.6,
"drill": 0.3
},
{
"diameter": 0.8,
"drill": 0.4
}
],
"zones_allow_external_fillets": false,
"zones_use_no_outline": true
},
"layer_presets": []
},
"boards": [],
"cvpcb": {
"equivalence_files": []
},
"erc": {
"erc_exclusions": [],
"meta": {
"version": 0
},
"pin_map": [
[
0,
0,
0,
0,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
2,
0,
1,
0,
0,
1,
0,
2,
2,
2,
2
],
[
0,
0,
0,
0,
0,
0,
1,
0,
1,
0,
1,
2
],
[
0,
1,
0,
0,
0,
0,
1,
1,
2,
1,
1,
2
],
[
0,
0,
0,
0,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
2
],
[
1,
1,
1,
1,
1,
0,
1,
1,
1,
1,
1,
2
],
[
0,
0,
0,
1,
0,
0,
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0,
0,
0,
0,
2
],
[
0,
2,
1,
2,
0,
0,
1,
0,
2,
2,
2,
2
],
[
0,
2,
0,
1,
0,
0,
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0,
2,
0,
0,
2
],
[
0,
2,
1,
1,
0,
0,
1,
0,
2,
0,
0,
2
],
[
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2
]
],
"rule_severities": {
"bus_definition_conflict": "error",
"bus_entry_needed": "error",
"bus_label_syntax": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_reference": "error",
"duplicate_sheet_names": "error",
"extra_units": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
"no_connect_dangling": "warning",
"pin_not_connected": "error",
"pin_not_driven": "error",
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"unannotated": "error",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
"wire_dangling": "error"
}
},
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
},
"meta": {
"filename": "P1_wifi.kicad_pro",
"version": 1
},
"net_settings": {
"classes": [
{
"bus_width": 12.0,
"clearance": 0.2032,
"diff_pair_gap": 0.2032,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2032,
"line_style": 0,
"microvia_diameter": 0.3048,
"microvia_drill": 0.1016,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.254,
"via_diameter": 0.6,
"via_drill": 0.3,
"wire_width": 6.0
},
{
"bus_width": 12.0,
"clearance": 0.2032,
"diff_pair_gap": 0.2032,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2032,
"line_style": 0,
"microvia_diameter": 0.3048,
"microvia_drill": 0.1016,
"name": "POWER",
"nets": [
"+3V3",
"+5V",
"GND"
],
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.254,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
}
],
"meta": {
"version": 2
},
"net_colors": null
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "",
"specctra_dsn": "",
"step": "",
"vrml": ""
},
"page_layout_descr_file": ""
},
"schematic": {
"annotate_start_num": 0,
"drawing": {
"default_line_thickness": 6.0,
"default_text_size": 50.0,
"field_names": [],
"intersheets_ref_own_page": false,
"intersheets_ref_prefix": "",
"intersheets_ref_short": false,
"intersheets_ref_show": false,
"intersheets_ref_suffix": "",
"junction_size_choice": 3,
"label_size_ratio": 0.25,
"pin_symbol_size": 0.0,
"text_offset_ratio": 0.08
},
"legacy_lib_dir": "",
"legacy_lib_list": [],
"meta": {
"version": 1
},
"net_format_name": "",
"ngspice": {
"fix_include_paths": true,
"fix_passive_vals": false,
"meta": {
"version": 0
},
"model_mode": 0,
"workbook_filename": ""
},
"page_layout_descr_file": "empty.kicad_wks",
"plot_directory": "",
"spice_adjust_passive_values": false,
"spice_external_command": "spice \"%I\"",
"subpart_first_id": 65,
"subpart_id_separator": 0
},
"sheets": [
[
"89b56c87-e3c8-4fd6-a3d6-245c2a24deb0",
""
]
],
"text_variables": {}
}

3375
P1_wifi/P1_wifi.kicad_sch Normal file

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@@ -1,4 +1,4 @@
update=2021 April 30, Friday 14:03:15
update=2021 September 28, Tuesday 10:20:38
version=1
last_client=kicad
[general]
@@ -12,16 +12,6 @@ NetIExt=net
version=1
LibDir=
[eeschema/libraries]
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=
SpiceAjustPassiveValues=0
LabSize=50
ERC_TestSimilarLabels=1
[pcbnew]
version=1
PageLayoutDescrFile=
@@ -263,3 +253,13 @@ uViaDrill=0.1016
dPairWidth=0.2032
dPairGap=0.2032
dPairViaGap=0.25
[schematic_editor]
version=1
PageLayoutDescrFile=empty.kicad_wks
PlotDirectoryName=
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=
SpiceAjustPassiveValues=0
LabSize=50
ERC_TestSimilarLabels=1

View File

@@ -569,7 +569,6 @@ Wire Wire Line
2150 4300 2150 4250
NoConn ~ 1250 3150
NoConn ~ 1250 3350
NoConn ~ 1250 3650
$Comp
L power:GND #PWR0104
U 1 1 60BCD1DA
@@ -714,17 +713,6 @@ F 3 "" H 10200 3450 50 0001 C CNN
$EndComp
Wire Wire Line
10200 3450 10200 3350
$Comp
L Connector:Conn_01x04_Male J3
U 1 1 60CAF614
P 2050 1400
F 0 "J3" H 2022 1282 50 0000 R CNN
F 1 "Conn_01x04_Male" H 2022 1373 50 0000 R CNN
F 2 "MySymbols:OLED_I2C_128x32" H 2050 1400 50 0001 C CNN
F 3 "~" H 2050 1400 50 0001 C CNN
1 2050 1400
1 0 0 1
$EndComp
Wire Wire Line
950 3550 1250 3550
Text Label 3400 3350 2 50 ~ 0
@@ -735,44 +723,32 @@ Wire Wire Line
3400 3250 3050 3250
Wire Wire Line
3400 3350 3050 3350
Text Label 2650 1300 2 50 ~ 0
Text Label 9250 6400 0 50 ~ 0
ESP_SCL
Text Label 2650 1200 2 50 ~ 0
Text Label 9250 6500 0 50 ~ 0
EPS_SDA
$Comp
L power:+3.3V #PWR01
U 1 1 60CC9A0A
P 2800 1150
F 0 "#PWR01" H 2800 1000 50 0001 C CNN
F 1 "+3.3V" V 2815 1278 50 0000 L CNN
F 2 "" H 2800 1150 50 0001 C CNN
F 3 "" H 2800 1150 50 0001 C CNN
1 2800 1150
P 8750 5850
F 0 "#PWR01" H 8750 5700 50 0001 C CNN
F 1 "+3.3V" V 8765 5978 50 0000 L CNN
F 2 "" H 8750 5850 50 0001 C CNN
F 3 "" H 8750 5850 50 0001 C CNN
1 8750 5850
1 0 0 -1
$EndComp
Wire Wire Line
2650 1200 2250 1200
Wire Wire Line
2650 1300 2250 1300
Wire Wire Line
2800 1150 2800 1400
Wire Wire Line
2800 1400 2250 1400
$Comp
L power:GND #PWR010
U 1 1 60CF9541
P 2800 1550
F 0 "#PWR010" H 2800 1300 50 0001 C CNN
F 1 "GND" H 2805 1377 50 0000 C CNN
F 2 "" H 2800 1550 50 0001 C CNN
F 3 "" H 2800 1550 50 0001 C CNN
1 2800 1550
P 7900 7450
F 0 "#PWR010" H 7900 7200 50 0001 C CNN
F 1 "GND" H 7905 7277 50 0000 C CNN
F 2 "" H 7900 7450 50 0001 C CNN
F 3 "" H 7900 7450 50 0001 C CNN
1 7900 7450
1 0 0 -1
$EndComp
Wire Wire Line
2800 1550 2800 1500
Wire Wire Line
2800 1500 2250 1500
$Comp
L Regulator_Linear:MIC5219-3.3YM5 U2
U 1 1 60DC1061
@@ -855,4 +831,194 @@ Text Notes -3250 1550 0 118 ~ 0
TODO for v 1.3\n- change Q1 to common device\n- smaller refdes\n
Wire Wire Line
9650 2950 10200 2950
$Comp
L P1_wifi-eagle-import:DISP_OLED_UG-2832HSWEG02 LCD1
U 1 1 6153C2F2
P 10100 6200
F 0 "LCD1" H 10428 6290 42 0000 L CNN
F 1 "DISP_OLED_UG-2832HSWEG02" H 10428 6211 42 0000 L CNN
F 2 "Display:SSD1306_OLED-0.91-128x32_bend" H 10200 5450 50 0001 C CNN
F 3 "" H 10100 6200 50 0001 C CNN
1 10100 6200
1 0 0 -1
$EndComp
Wire Wire Line
9250 6500 9700 6500
Wire Wire Line
9700 5900 8750 5900
Wire Wire Line
8750 5900 8750 5850
Wire Wire Line
9750 6200 9700 6200
Wire Wire Line
8750 6200 8750 5900
Connection ~ 9700 6200
Wire Wire Line
9700 6200 8750 6200
Connection ~ 8750 5900
$Comp
L Device:C C5
U 1 1 615551C0
P 8450 5900
F 0 "C5" V 8198 5900 50 0000 C CNN
F 1 "1uF" V 8289 5900 50 0000 C CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 8488 5750 50 0001 C CNN
F 3 "~" H 8450 5900 50 0001 C CNN
1 8450 5900
0 1 1 0
$EndComp
$Comp
L Device:C C6
U 1 1 61555C46
P 8250 6200
F 0 "C6" V 8500 6200 50 0000 C CNN
F 1 "1uF" V 8400 6200 50 0000 C CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 8288 6050 50 0001 C CNN
F 3 "~" H 8250 6200 50 0001 C CNN
1 8250 6200
0 1 -1 0
$EndComp
Wire Wire Line
8750 5900 8600 5900
Wire Wire Line
8750 6200 8400 6200
Connection ~ 8750 6200
Wire Wire Line
8100 6200 7900 6200
Wire Wire Line
7900 6200 7900 6600
Wire Wire Line
8300 5900 7900 5900
Wire Wire Line
7900 5900 7900 6100
Connection ~ 7900 6200
$Comp
L Device:C C9
U 1 1 6156C45C
P 8650 6700
F 0 "C9" V 8900 6700 50 0000 C CNN
F 1 "10uF" V 8800 6700 50 0000 C CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 8688 6550 50 0001 C CNN
F 3 "~" H 8650 6700 50 0001 C CNN
1 8650 6700
0 1 -1 0
$EndComp
$Comp
L Device:C C7
U 1 1 6156D10F
P 8250 6800
F 0 "C7" V 8500 6800 50 0000 C CNN
F 1 "10uF" V 8400 6800 50 0000 C CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 8288 6650 50 0001 C CNN
F 3 "~" H 8250 6800 50 0001 C CNN
1 8250 6800
0 1 -1 0
$EndComp
Wire Wire Line
9700 6800 8500 6800
Wire Wire Line
8800 6700 9700 6700
Wire Wire Line
8500 6700 7900 6700
Connection ~ 7900 6700
Wire Wire Line
7900 6700 7900 6800
Wire Wire Line
8100 6800 7900 6800
Connection ~ 7900 6800
Wire Wire Line
7900 6800 7900 7250
Wire Wire Line
9700 6400 9250 6400
$Comp
L Device:R R10
U 1 1 6158C8A1
P 9000 6600
F 0 "R10" V 9100 6650 50 0000 C CNN
F 1 "560K" V 9100 6500 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 8930 6600 50 0001 C CNN
F 3 "~" H 9000 6600 50 0001 C CNN
1 9000 6600
0 -1 -1 0
$EndComp
Wire Wire Line
9150 6600 9700 6600
Wire Wire Line
8850 6600 7900 6600
Connection ~ 7900 6600
Wire Wire Line
7900 6600 7900 6700
Wire Wire Line
9700 6100 7900 6100
Connection ~ 7900 6100
Wire Wire Line
7900 6100 7900 6200
$Comp
L Device:C C11
U 1 1 61599E55
P 9400 5500
F 0 "C11" V 9148 5500 50 0000 C CNN
F 1 "1uF" V 9239 5500 50 0000 C CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 9438 5350 50 0001 C CNN
F 3 "~" H 9400 5500 50 0001 C CNN
1 9400 5500
0 1 1 0
$EndComp
$Comp
L Device:C C10
U 1 1 6159A39E
P 9150 5700
F 0 "C10" V 8898 5700 50 0000 C CNN
F 1 "1uF" V 8989 5700 50 0000 C CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 9188 5550 50 0001 C CNN
F 3 "~" H 9150 5700 50 0001 C CNN
1 9150 5700
0 1 1 0
$EndComp
Wire Wire Line
9000 5700 8950 5700
Wire Wire Line
8950 5700 8950 5800
Wire Wire Line
8950 5800 9700 5800
Wire Wire Line
9700 5700 9300 5700
Wire Wire Line
9250 5600 9700 5600
Wire Wire Line
9250 5500 9250 5600
Wire Wire Line
9700 5500 9550 5500
$Comp
L Device:C C8
U 1 1 615B16C7
P 8250 7250
F 0 "C8" V 8500 7250 50 0000 C CNN
F 1 "100nF" V 8400 7250 50 0000 C CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 8288 7100 50 0001 C CNN
F 3 "~" H 8250 7250 50 0001 C CNN
1 8250 7250
0 1 -1 0
$EndComp
Wire Wire Line
8100 7250 7900 7250
Connection ~ 7900 7250
Wire Wire Line
7900 7250 7900 7450
Wire Wire Line
8400 7250 8500 7250
Wire Wire Line
8500 7250 8500 6800
Connection ~ 8500 6800
Wire Wire Line
8500 6800 8400 6800
Text Label 9250 6300 0 50 ~ 0
OLED_RST
Wire Wire Line
9250 6300 9700 6300
NoConn ~ 9700 6000
Text Label 950 3650 0 50 ~ 0
OLED_RST
Wire Wire Line
1250 3650 950 3650
$EndSCHEMATC

View File

@@ -410,7 +410,7 @@ F 0 "R5" V 4250 3200 50 0000 C CNN
F 1 "10K" V 4250 3350 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 4280 3250 50 0001 C CNN
F 3 "~" H 4350 3250 50 0001 C CNN
F 4 "DNP" V 4350 3250 50 0000 C CNN "DNP"
F 4 "" V 4350 3250 50 0001 C CNN "DNP"
1 4350 3250
0 1 1 0
$EndComp
@@ -569,7 +569,6 @@ Wire Wire Line
2150 4300 2150 4250
NoConn ~ 1250 3150
NoConn ~ 1250 3350
NoConn ~ 1250 3650
$Comp
L power:GND #PWR0104
U 1 1 60BCD1DA
@@ -714,17 +713,6 @@ F 3 "" H 10200 3450 50 0001 C CNN
$EndComp
Wire Wire Line
10200 3450 10200 3350
$Comp
L Connector:Conn_01x04_Male J3
U 1 1 60CAF614
P 2050 1400
F 0 "J3" H 2022 1282 50 0000 R CNN
F 1 "Conn_01x04_Male" H 2022 1373 50 0000 R CNN
F 2 "MySymbols:OLED_I2C_128x32" H 2050 1400 50 0001 C CNN
F 3 "~" H 2050 1400 50 0001 C CNN
1 2050 1400
1 0 0 1
$EndComp
Wire Wire Line
950 3550 1250 3550
Text Label 3400 3350 2 50 ~ 0
@@ -735,44 +723,32 @@ Wire Wire Line
3400 3250 3050 3250
Wire Wire Line
3400 3350 3050 3350
Text Label 2650 1300 2 50 ~ 0
Text Label 9250 6400 0 50 ~ 0
ESP_SCL
Text Label 2650 1200 2 50 ~ 0
Text Label 9250 6500 0 50 ~ 0
EPS_SDA
$Comp
L power:+3.3V #PWR01
U 1 1 60CC9A0A
P 2800 1150
F 0 "#PWR01" H 2800 1000 50 0001 C CNN
F 1 "+3.3V" V 2815 1278 50 0000 L CNN
F 2 "" H 2800 1150 50 0001 C CNN
F 3 "" H 2800 1150 50 0001 C CNN
1 2800 1150
P 8750 5850
F 0 "#PWR01" H 8750 5700 50 0001 C CNN
F 1 "+3.3V" V 8765 5978 50 0000 L CNN
F 2 "" H 8750 5850 50 0001 C CNN
F 3 "" H 8750 5850 50 0001 C CNN
1 8750 5850
1 0 0 -1
$EndComp
Wire Wire Line
2650 1200 2250 1200
Wire Wire Line
2650 1300 2250 1300
Wire Wire Line
2800 1150 2800 1400
Wire Wire Line
2800 1400 2250 1400
$Comp
L power:GND #PWR010
U 1 1 60CF9541
P 2800 1550
F 0 "#PWR010" H 2800 1300 50 0001 C CNN
F 1 "GND" H 2805 1377 50 0000 C CNN
F 2 "" H 2800 1550 50 0001 C CNN
F 3 "" H 2800 1550 50 0001 C CNN
1 2800 1550
P 7900 7450
F 0 "#PWR010" H 7900 7200 50 0001 C CNN
F 1 "GND" H 7905 7277 50 0000 C CNN
F 2 "" H 7900 7450 50 0001 C CNN
F 3 "" H 7900 7450 50 0001 C CNN
1 7900 7450
1 0 0 -1
$EndComp
Wire Wire Line
2800 1550 2800 1500
Wire Wire Line
2800 1500 2250 1500
$Comp
L Regulator_Linear:MIC5219-3.3YM5 U2
U 1 1 60DC1061
@@ -855,4 +831,194 @@ Text Notes -3250 1550 0 118 ~ 0
TODO for v 1.3\n- change Q1 to common device\n- smaller refdes\n
Wire Wire Line
9650 2950 10200 2950
$Comp
L P1_wifi-eagle-import:DISP_OLED_UG-2832HSWEG02 LCD1
U 1 1 6153C2F2
P 10100 6200
F 0 "LCD1" H 10428 6290 42 0000 L CNN
F 1 "DISP_OLED_UG-2832HSWEG02" H 10428 6211 42 0000 L CNN
F 2 "Display:SSD1306_OLED-0.91-128x32_bend" H 10200 5450 50 0001 C CNN
F 3 "" H 10100 6200 50 0001 C CNN
1 10100 6200
1 0 0 -1
$EndComp
Wire Wire Line
9250 6500 9700 6500
Wire Wire Line
9700 5900 8750 5900
Wire Wire Line
8750 5900 8750 5850
Wire Wire Line
9750 6200 9700 6200
Wire Wire Line
8750 6200 8750 5900
Connection ~ 9700 6200
Wire Wire Line
9700 6200 8750 6200
Connection ~ 8750 5900
$Comp
L Device:C C5
U 1 1 615551C0
P 8450 5900
F 0 "C5" V 8198 5900 50 0000 C CNN
F 1 "1uF" V 8289 5900 50 0000 C CNN
F 2 "Capacitor_SMD:C_0805_2012Metric" H 8488 5750 50 0001 C CNN
F 3 "~" H 8450 5900 50 0001 C CNN
1 8450 5900
0 1 1 0
$EndComp
$Comp
L Device:C C6
U 1 1 61555C46
P 8250 6200
F 0 "C6" V 8500 6200 50 0000 C CNN
F 1 "1uF" V 8400 6200 50 0000 C CNN
F 2 "Capacitor_SMD:C_0805_2012Metric" H 8288 6050 50 0001 C CNN
F 3 "~" H 8250 6200 50 0001 C CNN
1 8250 6200
0 1 -1 0
$EndComp
Wire Wire Line
8750 5900 8600 5900
Wire Wire Line
8750 6200 8400 6200
Connection ~ 8750 6200
Wire Wire Line
8100 6200 7900 6200
Wire Wire Line
7900 6200 7900 6600
Wire Wire Line
8300 5900 7900 5900
Wire Wire Line
7900 5900 7900 6100
Connection ~ 7900 6200
$Comp
L Device:C C9
U 1 1 6156C45C
P 8650 6700
F 0 "C9" V 8900 6700 50 0000 C CNN
F 1 "10uF" V 8800 6700 50 0000 C CNN
F 2 "Capacitor_SMD:C_0805_2012Metric" H 8688 6550 50 0001 C CNN
F 3 "~" H 8650 6700 50 0001 C CNN
1 8650 6700
0 1 -1 0
$EndComp
$Comp
L Device:C C7
U 1 1 6156D10F
P 8250 6800
F 0 "C7" V 8500 6800 50 0000 C CNN
F 1 "10uF" V 8400 6800 50 0000 C CNN
F 2 "Capacitor_SMD:C_0805_2012Metric" H 8288 6650 50 0001 C CNN
F 3 "~" H 8250 6800 50 0001 C CNN
1 8250 6800
0 1 -1 0
$EndComp
Wire Wire Line
9700 6800 8500 6800
Wire Wire Line
8800 6700 9700 6700
Wire Wire Line
8500 6700 7900 6700
Connection ~ 7900 6700
Wire Wire Line
7900 6700 7900 6800
Wire Wire Line
8100 6800 7900 6800
Connection ~ 7900 6800
Wire Wire Line
7900 6800 7900 7250
Wire Wire Line
9700 6400 9250 6400
$Comp
L Device:R R10
U 1 1 6158C8A1
P 9000 6600
F 0 "R10" V 9100 6650 50 0000 C CNN
F 1 "560K" V 9100 6500 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 8930 6600 50 0001 C CNN
F 3 "~" H 9000 6600 50 0001 C CNN
1 9000 6600
0 -1 -1 0
$EndComp
Wire Wire Line
9150 6600 9700 6600
Wire Wire Line
8850 6600 7900 6600
Connection ~ 7900 6600
Wire Wire Line
7900 6600 7900 6700
Wire Wire Line
9700 6100 7900 6100
Connection ~ 7900 6100
Wire Wire Line
7900 6100 7900 6200
$Comp
L Device:C C11
U 1 1 61599E55
P 9400 5500
F 0 "C11" V 9148 5500 50 0000 C CNN
F 1 "1uF" V 9239 5500 50 0000 C CNN
F 2 "Capacitor_SMD:C_0805_2012Metric" H 9438 5350 50 0001 C CNN
F 3 "~" H 9400 5500 50 0001 C CNN
1 9400 5500
0 1 1 0
$EndComp
$Comp
L Device:C C10
U 1 1 6159A39E
P 9150 5700
F 0 "C10" V 8898 5700 50 0000 C CNN
F 1 "1uF" V 8989 5700 50 0000 C CNN
F 2 "Capacitor_SMD:C_0805_2012Metric" H 9188 5550 50 0001 C CNN
F 3 "~" H 9150 5700 50 0001 C CNN
1 9150 5700
0 1 1 0
$EndComp
Wire Wire Line
9000 5700 8950 5700
Wire Wire Line
8950 5700 8950 5800
Wire Wire Line
8950 5800 9700 5800
Wire Wire Line
9700 5700 9300 5700
Wire Wire Line
9250 5600 9700 5600
Wire Wire Line
9250 5500 9250 5600
Wire Wire Line
9700 5500 9550 5500
$Comp
L Device:C C8
U 1 1 615B16C7
P 8250 7250
F 0 "C8" V 8500 7250 50 0000 C CNN
F 1 "100nF" V 8400 7250 50 0000 C CNN
F 2 "Capacitor_SMD:C_0805_2012Metric" H 8288 7100 50 0001 C CNN
F 3 "~" H 8250 7250 50 0001 C CNN
1 8250 7250
0 1 -1 0
$EndComp
Wire Wire Line
8100 7250 7900 7250
Connection ~ 7900 7250
Wire Wire Line
7900 7250 7900 7450
Wire Wire Line
8400 7250 8500 7250
Wire Wire Line
8500 7250 8500 6800
Connection ~ 8500 6800
Wire Wire Line
8500 6800 8400 6800
Text Label 9250 6300 0 50 ~ 0
OLED_RST
Wire Wire Line
9250 6300 9700 6300
NoConn ~ 9700 6000
Text Label 950 3650 0 50 ~ 0
OLED_RST
Wire Wire Line
1250 3650 950 3650
$EndSCHEMATC

5
P1_wifi/empty.kicad_wks Normal file
View File

@@ -0,0 +1,5 @@
(page_layout
(setup (textsize 1.5 1.5)(linewidth 0.15)(textlinewidth 0.15)
(left_margin 10)(right_margin 10)(top_margin 10)(bottom_margin 10))
(line (name segm1:Line) (start 0 0) (end 0 0))
)

File diff suppressed because it is too large Load Diff

View File

@@ -1,3 +1,4 @@
(sym_lib_table
(lib (name P1_wifi-rescue)(type Legacy)(uri ${KIPRJMOD}/P1_wifi-rescue.lib)(options "")(descr ""))
(lib (name P1_wifi-eagle-import)(type Legacy)(uri ${KIPRJMOD}/P1_wifi-eagle-import.lib)(options "")(descr ""))
)