add type hints to enums
force byte
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@@ -135,7 +135,7 @@ class MFRC522 {
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public:
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// MFRC522 registers. Described in chapter 9 of the datasheet.
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// When using SPI all addresses are shifted one bit left in the "SPI address byte" (section 8.1.2.3)
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enum PCD_Register {
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enum PCD_Register : byte {
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// Page 0: Command and status
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// 0x00 // reserved for future use
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CommandReg = 0x01 << 1, // starts and stops command execution
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@@ -210,7 +210,7 @@ public:
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};
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// MFRC522 commands. Described in chapter 10 of the datasheet.
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enum PCD_Command {
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enum PCD_Command : byte {
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PCD_Idle = 0x00, // no action, cancels current command execution
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PCD_Mem = 0x01, // stores 25 bytes into the internal buffer
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PCD_GenerateRandomID = 0x02, // generates a 10-byte random ID number
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@@ -225,7 +225,7 @@ public:
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// MFRC522 RxGain[2:0] masks, defines the receiver's signal voltage gain factor (on the PCD).
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// Described in 9.3.3.6 / table 98 of the datasheet at http://www.nxp.com/documents/data_sheet/MFRC522.pdf
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enum PCD_RxGain {
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enum PCD_RxGain : byte {
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RxGain_18dB = 0x00 << 4, // 000b - 18 dB, minimum
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RxGain_23dB = 0x01 << 4, // 001b - 23 dB
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RxGain_18dB_2 = 0x02 << 4, // 010b - 18 dB, it seems 010b is a duplicate for 000b
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@@ -240,7 +240,7 @@ public:
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};
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// Commands sent to the PICC.
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enum PICC_Command {
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enum PICC_Command : byte {
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// The commands used by the PCD to manage communication with several PICCs (ISO 14443-3, Type A, section 6.4)
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PICC_CMD_REQA = 0x26, // REQuest command, Type A. Invites PICCs in state IDLE to go to READY and prepare for anticollision or selection. 7 bit frame.
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PICC_CMD_WUPA = 0x52, // Wake-UP command, Type A. Invites PICCs in state IDLE and HALT to go to READY(*) and prepare for anticollision or selection. 7 bit frame.
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