EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# AUDIOAMP_MAX98357-Analog_DAC
#
DEF AUDIOAMP_MAX98357-Analog_DAC U 0 40 Y Y 1 L N
F0 "U" -500 700 42 H V L BNN
F1 "AUDIOAMP_MAX98357-Analog_DAC" -500 -700 42 H V L BNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
T 0 100 -500 42 0 1 0 "2.5-5.5V_-40~85°C" Normal 0 L C
T 0 0 500 42 0 1 0 "MAX98357_3.2W I2S Mono Amp" Normal 0 C C
T 0 -400 -500 42 0 1 0 "VDD:_Op. Temp:" Normal 0 L C
P 2 1 0 0 -500 -600 500 -600 N
P 2 1 0 0 -500 -400 -500 -600 N
P 2 1 0 0 -500 -400 -500 400 N
P 2 1 0 0 -500 400 -500 600 N
P 2 1 0 0 -500 400 500 400 N
P 2 1 0 0 -500 600 500 600 N
P 2 1 0 0 500 -600 500 -400 N
P 2 1 0 0 500 -400 -500 -400 N
P 2 1 0 0 500 400 500 -400 N
P 2 1 0 0 500 600 500 400 N
X DIN 1 -600 0 100 R 50 50 1 0 B
X OUTN 10 600 0 100 L 50 50 1 0 O
X GND 11 -600 -300 100 R 0 50 1 0 W
X LRCLK 14 -600 100 100 R 50 50 1 0 B
X GND 15 -600 -300 100 R 0 50 1 0 W
X BCLK 16 -600 200 100 R 50 50 1 0 B
X GAIN 2 600 -300 100 L 50 50 1 0 B
X GND 3 -600 -300 100 R 0 50 1 0 W
X ~SD_MODE 4 -600 300 100 R 50 50 1 0 B
X VDD 7 -600 -200 100 R 0 50 1 0 W
X VDD 8 -600 -200 100 R 0 50 1 0 W
X OUTP 9 600 300 100 L 50 50 1 0 O
X GND THERMAL -600 -300 100 R 0 50 1 0 W
X THERMAL 17 -600 -400 100 R 50 50 1 1 W
ENDDRAW
ENDDEF
#
# CR95HF-VMD5T-ST25CR95HF
#
DEF CR95HF-VMD5T-ST25CR95HF U 0 10 Y Y 1 L N
F0 "U" 100 1250 60 H V C CNN
F1 "CR95HF-VMD5T-ST25CR95HF" 100 1150 60 H V C CNN
F2 "VFQFPN32_5X5_STM" 150 1050 60 H I C CNN
F3 "" 250 -2050 60 H V C CNN
$FPLIST
 VFQFPN32_5X5_STM
 VFQFPN32_5X5_STM-M
 VFQFPN32_5X5_STM-L
$ENDFPLIST
DRAW
S 850 1000 -700 -1200 1 1 0 N
X TX1 1 1150 250 300 L 59 59 1 1 B
X NC 10 -1000 -950 300 R 59 59 1 1 N N
X NC 11 -1000 -850 300 R 59 59 1 1 N N
X UART_RX/IRQ_IN 12 -1000 -650 300 R 59 59 1 1 U
X VPS 13 250 1300 300 D 59 59 1 1 U
X UART_TX/IRQ_OUT 14 -1000 -750 300 R 59 59 1 1 O
X SPI_SS 15 -1000 -450 300 R 59 59 1 1 U
X SPI_MISO 16 -1000 -350 300 R 59 59 1 1 U
X SPI_MOSI 17 -1000 -250 300 R 59 59 1 1 U
X SPI_SCK 18 -1000 -150 300 R 59 59 1 1 U
X SSI_0 19 -1000 150 300 R 59 59 1 1 B
X TX2 2 1150 100 300 L 59 59 1 1 B
X SSI_1 20 -1000 250 300 R 59 59 1 1 B
X SR_R1 21 -1000 900 300 R 59 59 1 1 U
X GND 22 300 -1500 300 U 59 59 1 1 W
X NC 23 0 -1500 300 U 59 59 1 1 N N
X NC 24 -100 -1500 300 U 59 59 1 1 N N
X NC 25 -200 -1500 300 U 59 59 1 1 N N
X NC 26 -300 -1500 300 U 59 59 1 1 N N
X NC 27 -400 -1500 300 U 59 59 1 1 N N
X NC 28 -500 -1500 300 U 59 59 1 1 N N
X XIN 29 -1000 750 300 R 59 59 1 1 U
X NC 3 200 -1500 300 U 59 59 1 1 N N
X XOUT 30 -1000 650 300 R 59 59 1 1 O
X GND_TX 31 400 -1500 300 U 59 59 1 1 W
X VPS_TX 32 -100 1300 300 D 59 59 1 1 U
X EP 33 650 -1500 299 U 50 50 1 1 I
X NC 4 100 -1500 300 U 59 59 1 1 N N
X RX1 5 1150 400 300 L 59 59 1 1 B
X RX2 6 1150 -50 300 L 59 59 1 1 B
X NC 7 -1000 -1050 300 R 59 59 1 1 N N
X GND_RX 8 500 -1500 300 U 59 59 1 1 W
X ST_R0 9 1150 -400 300 L 59 59 1 1 U
ENDDRAW
ENDDEF
#
# ESP32-S2-RF_Module
#
DEF ESP32-S2-RF_Module U? 0 10 Y Y 1 F N
F0 "U?" 1750 700 60 H V C CNN
F1 "ESP32-S2-RF_Module" 1700 -3700 60 H V C CNN
F2 "QFN56_ESP32_7X7_EXP" 1700 -3800 60 H I C CNN
F3 "" -1150 -700 60 H I C CNN
F4 "ESP32-S2FN4R2" 0 0 50 H I C CNN "ORDERCODE"
$FPLIST
 QFN56_ESP32_7X7_EXP
 QFN56_ESP32_7X7_EXP-M
 QFN56_ESP32_7X7_EXP-L
$ENDFPLIST
DRAW
S 300 650 1900 -3650 0 1 0 f
X VDDA 1 750 950 300 D 59 59 1 1 W
X GPIO5 10 2200 -650 300 L 59 59 1 1 B
X GPIO6 11 2200 -750 300 L 59 59 1 1 B
X GPIO7 12 2200 -850 300 L 59 59 1 1 B
X GPIO8 13 2200 -950 300 L 59 59 1 1 B
X GPIO9 14 2200 -1050 300 L 59 59 1 1 B
X GPIO10 15 2200 -1150 300 L 59 59 1 1 B
X GPIO11 16 2200 -1250 300 L 59 59 1 1 B
X GPIO12 17 2200 -1350 300 L 59 59 1 1 B
X GPIO13 18 2200 -1450 300 L 59 59 1 1 B
X GPIO14 19 2200 -1550 300 L 59 59 1 1 B
X LNA_IN 2 2200 200 300 L 59 59 1 1 U
X VDD3P3_RTC 20 1050 950 300 D 59 59 1 1 W
X 32K_P/GPIO15 21 0 -1700 300 R 59 59 1 1 B
X 32K_N/GPIO16 22 0 -1800 300 R 59 59 1 1 B
X DAC1/GPIO17 23 2200 -1850 300 L 59 59 1 1 B
X DAC_2/GPIO18 24 2200 -1950 300 L 59 59 1 1 B
X GPIO19/D- 25 0 -400 300 R 59 59 1 1 B
X GPIO20/D+ 26 0 -300 300 R 59 59 1 1 B
X VDD3P3_RTC_IO 27 1350 950 300 D 59 59 1 1 W
X GPIO21 28 2200 -2050 300 L 59 59 1 1 B
X SPIS1/~PSR_CS 29 0 -850 300 R 59 59 1 1 U
X VDD3P3 3 1250 950 300 D 59 59 1 1 W
X VDD_SPI 30 0 -3500 300 R 59 59 1 1 w
X SPIHD/~HOLD~/SIO3 31 0 -1350 300 R 59 59 1 1 U
X SPIWP/~WP~/SIO2 32 0 -1250 300 R 59 59 1 1 U
X SPIS0/~FLASH_CS 33 0 -750 300 R 59 59 1 1 U
X SPICLK 34 0 -950 300 R 59 59 1 1 U
X SPIQ/D0/SIO1 35 0 -1150 300 R 59 59 1 1 U
X SPID/DI/SIO0 36 0 -1050 300 R 59 59 1 1 U
X GPIO33 37 2200 -2150 300 L 59 59 1 1 B
X GPIO34 38 2200 -2250 300 L 59 59 1 1 B
X GPIO35 39 2200 -2350 300 L 59 59 1 1 B
X VDD3P3 4 1150 950 300 D 59 59 1 1 W
X GPIO36 40 2200 -2450 300 L 59 59 1 1 B
X GPIO37 41 2200 -2550 300 L 59 59 1 1 B
X GPIO38 42 2200 -2650 300 L 59 59 1 1 B
X MTCK/GPIO39 43 2200 -2750 300 L 59 59 1 1 U
X MTDO/GPIO40 44 2200 -2850 300 L 59 59 1 1 U
X VDD3P3_CPU 45 1450 950 300 D 59 59 1 1 W
X MTDI/GPIO41 46 2200 -2950 300 L 59 59 1 1 U
X MTMS/GPIO42 47 2200 -3050 300 L 59 59 1 1 U
X U0TXD/GPIO43 48 2200 -3150 300 L 59 59 1 1 B
X U0RXD/GPIO44 49 2200 -3250 300 L 59 59 1 1 B
X BOOT0/GPIO0 5 2200 -150 300 L 59 59 1 1 B
X VDD_SPI_SEL/GPIO45 50 2200 -3350 300 L 59 59 1 1 B
X VDDA 51 950 950 300 D 59 59 1 1 W
X XTAL_N 52 0 -2150 300 R 59 59 1 1 U
X XTAL_P 53 0 -2050 300 R 59 59 1 1 U
X VDDA 54 850 950 300 D 59 59 1 1 W
X BOOT1/GPIO46 55 2200 -3450 300 L 59 59 1 1 B
X CHIP_PU 56 0 200 300 R 59 59 1 1 U
X GND 57 1050 -3950 300 U 59 59 1 1 W
X GPIO1 6 2200 -250 300 L 59 59 1 1 B
X GPIO2 7 2200 -350 300 L 59 59 1 1 B
X GPIO3 8 2200 -450 300 L 59 59 1 1 B
X GPIO4 9 2200 -550 300 L 59 59 1 1 B
ENDDRAW
ENDDEF
#
#End Library