Fab automation (#2)
- Use KiKit for fab automation - Add splitflap scripts for exporting pcb pdfs, and switch to splitflap script for 3d rendering (for consistency with fab automation) - Added support in 3d rendering scripts for soldermask & silkscreen colors, option to skip virtual components - Added silkscreen to base and screen pcbs for commit and date info
This commit is contained in:
70
electronics/scripts/export_jlcpcb.py
Executable file
70
electronics/scripts/export_jlcpcb.py
Executable file
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#!/usr/bin/env python3
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# Copyright 2021 Scott Bezek and the splitflap contributors
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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import argparse
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import logging
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import os
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import subprocess
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import sys
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electronics_root = os.path.dirname(os.path.dirname(os.path.abspath(__file__)))
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repo_root = os.path.dirname(electronics_root)
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sys.path.append(repo_root)
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from util import file_util
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from export_util import (
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versioned_file,
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)
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logging.basicConfig(level=logging.DEBUG)
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logger = logging.getLogger(__name__)
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def export_jlcpcb(pcb, schematic, alt_fields):
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pcb_file = os.path.abspath(pcb)
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output_dir = os.path.join(electronics_root, 'build', os.path.splitext(os.path.basename(pcb_file))[0] + '-jlc')
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file_util.mkdir_p(output_dir)
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with versioned_file(pcb_file):
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command = [
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'kikit',
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'fab',
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'jlcpcb',
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]
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if schematic is not None:
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schematic_file = os.path.abspath(schematic)
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command += [
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'--assembly',
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'--schematic',
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schematic_file,
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'--field',
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]
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command.append(','.join(alt_fields + ['LCSC']))
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command += [
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pcb_file,
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output_dir,
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]
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subprocess.check_call(command)
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if __name__ == '__main__':
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parser = argparse.ArgumentParser()
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parser.add_argument('pcb')
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parser.add_argument('--assembly-schematic')
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parser.add_argument('--alt-fields', nargs='+')
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args = parser.parse_args()
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export_jlcpcb(args.pcb, args.assembly_schematic, args.alt_fields)
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