36 lines
1.4 KiB
Plaintext
36 lines
1.4 KiB
Plaintext
EESchema-LIBRARY Version 2.3
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#encoding utf-8
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#
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# SI5351A-B-GT
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#
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DEF SI5351A-B-GT U 0 40 Y Y 1 F N
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F0 "U" -200 350 60 H V R C N N
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F1 "SI5351A-B-GT" 50 -400 60 H V L C N N
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F2 "digikey-footprints:MSOP-10_W3mm" 200 200 60 H I L C N N
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F3 "https://www.silabs.com/documents/public/data-sheets/Si5351-B.pdf" 200 300 60 H I L C N N
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F4 "336-2399-5-ND" 200 400 60 H I L CNN "Digi-Key_PN"
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F5 "SI5351A-B-GT" 200 500 60 H I L CNN "MPN"
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F6 "Integrated Circuits (ICs)" 200 600 60 H I L CNN "Category"
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F7 "Clock/Timing - Clock Generators, PLLs, Frequency Synthesizers" 200 700 60 H I L CNN "Family"
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F8 "https://www.silabs.com/documents/public/data-sheets/Si5351-B.pdf" 200 800 60 H I L CNN "DK_Datasheet_Link"
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F9 "/product-detail/en/silicon-labs/SI5351A-B-GT/336-2399-5-ND/3679847" 200 900 60 H I L CNN "DK_Detail_Page"
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F10 "IC CLK GENERATOR 200MHZ 10MSOP" 200 1000 60 H I L CNN "Description"
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F11 "Silicon Labs" 200 1100 60 H I L CNN "Manufacturer"
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F12 "Active" 200 1200 60 H I L CNN "Status"
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DRAW
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S -300 300 300 -300 0 1 0 f
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X VDD 1 0 500 200 D 50 50 1 1 W
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X XA 2 -500 100 200 R 50 50 1 1 I
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X XB 3 -500 0 200 R 50 50 1 1 I
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X SCL 4 -500 -100 200 R 50 50 1 1 I
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X SDA 5 -500 -200 200 R 50 50 1 1 B
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X CLK2 6 500 -100 200 L 50 50 1 1 O
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X VDDO 7 -100 500 200 D 50 50 1 1 W
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X GND 8 0 -500 200 U 50 50 1 1 W
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X CLK1 9 500 0 200 L 50 50 1 1 O
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X CLK0 10 500 100 200 L 50 50 1 1 O
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ENDDRAW
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ENDDEF
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#
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#End Library
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