libs/RFID.MFRC522
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add self-test reference for 0x90

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This commit is contained in:
Rotzbua
2015-04-12 16:33:06 +02:00
parent b8136f2449
commit 33fc41a302
2 changed files with 23 additions and 6 deletions
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9
MFRC522.cpp
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@@ -285,9 +285,9 @@ bool MFRC522::PCD_PerformSelfTest() {
// 2. Clear the internal buffer by writing 25 bytes of 00h // 2. Clear the internal buffer by writing 25 bytes of 00h
byte ZEROES[25] = {0x00}; byte ZEROES[25] = {0x00};
PCD_SetRegisterBitMask(FIFOLevelReg, 0x80); // flush the FIFO buffer PCD_SetRegisterBitMask(FIFOLevelReg, 0x80); // flush the FIFO buffer
PCD_WriteRegister(FIFODataReg, 25, ZEROES); // write 25 bytes of 00h to FIFO PCD_WriteRegister(FIFODataReg, 25, ZEROES); // write 25 bytes of 00h to FIFO
PCD_WriteRegister(CommandReg, PCD_Mem); // transfer to internal buffer PCD_WriteRegister(CommandReg, PCD_Mem); // transfer to internal buffer
// 3. Enable self-test // 3. Enable self-test
PCD_WriteRegister(AutoTestReg, 0x09); PCD_WriteRegister(AutoTestReg, 0x09);
@@ -323,6 +323,9 @@ bool MFRC522::PCD_PerformSelfTest() {
// Pick the appropriate reference values // Pick the appropriate reference values
const byte *reference; const byte *reference;
switch (version) { switch (version) {
case 0x90: // Version 0.0
reference = MFRC522_firmware_referenceV0_0;
break;
case 0x91: // Version 1.0 case 0x91: // Version 1.0
reference = MFRC522_firmware_referenceV1_0; reference = MFRC522_firmware_referenceV1_0;
break; break;

20
MFRC522.h
View File

@@ -79,8 +79,21 @@
#include <SPI.h> #include <SPI.h>
// Firmware data for self-test // Firmware data for self-test
// Reference values based on firmware version; taken from 16.1.1 in spec. // Reference values based on firmware version
// Version 1.0 // Version 0.0 (0x90)
// Philips Semiconductors; Preliminary Specification Revision 2.0 - 01 August 2005; 16.1 Sefttest
const byte MFRC522_firmware_referenceV0_0[] PROGMEM = {
0x00, 0x87, 0x98, 0x0f, 0x49, 0xFF, 0x07, 0x19,
0xBF, 0x22, 0x30, 0x49, 0x59, 0x63, 0xAD, 0xCA,
0x7F, 0xE3, 0x4E, 0x03, 0x5C, 0x4E, 0x49, 0x50,
0x47, 0x9A, 0x37, 0x61, 0xE7, 0xE2, 0xC6, 0x2E,
0x75, 0x5A, 0xED, 0x04, 0x3D, 0x02, 0x4B, 0x78,
0x32, 0xFF, 0x58, 0x3B, 0x7C, 0xE9, 0x00, 0x94,
0xB4, 0x4A, 0x59, 0x5B, 0xFD, 0xC9, 0x29, 0xDF,
0x35, 0x96, 0x98, 0x9E, 0x4F, 0x30, 0x32, 0x8D
};
// Version 1.0 (0x91)
// NXP Semiconductors; Rev. 3.8 - 17 September 2014; 16.1.1 Self test
const byte MFRC522_firmware_referenceV1_0[] PROGMEM = { const byte MFRC522_firmware_referenceV1_0[] PROGMEM = {
0x00, 0xC6, 0x37, 0xD5, 0x32, 0xB7, 0x57, 0x5C, 0x00, 0xC6, 0x37, 0xD5, 0x32, 0xB7, 0x57, 0x5C,
0xC2, 0xD8, 0x7C, 0x4D, 0xD9, 0x70, 0xC7, 0x73, 0xC2, 0xD8, 0x7C, 0x4D, 0xD9, 0x70, 0xC7, 0x73,
@@ -91,7 +104,8 @@ const byte MFRC522_firmware_referenceV1_0[] PROGMEM = {
0x1F, 0xA7, 0xF3, 0x53, 0x14, 0xDE, 0x7E, 0x02, 0x1F, 0xA7, 0xF3, 0x53, 0x14, 0xDE, 0x7E, 0x02,
0xD9, 0x0F, 0xB5, 0x5E, 0x25, 0x1D, 0x29, 0x79 0xD9, 0x0F, 0xB5, 0x5E, 0x25, 0x1D, 0x29, 0x79
}; };
// Version 2.0 // Version 2.0 (0x92)
// NXP Semiconductors; Rev. 3.8 - 17 September 2014; 16.1.1 Self test
const byte MFRC522_firmware_referenceV2_0[] PROGMEM = { const byte MFRC522_firmware_referenceV2_0[] PROGMEM = {
0x00, 0xEB, 0x66, 0xBA, 0x57, 0xBF, 0x23, 0x95, 0x00, 0xEB, 0x66, 0xBA, 0x57, 0xBF, 0x23, 0x95,
0xD0, 0xE3, 0x0D, 0x3D, 0x27, 0x89, 0x5C, 0xDE, 0xD0, 0xE3, 0x0D, 0x3D, 0x27, 0x89, 0x5C, 0xDE,